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Experimental Computing Laboratory
Includes papers, presentations, conference publications and SAVANT VHDL, a free VHDL analyser and simulator. From University of Cincinnati.
http://www.ececs.uc.edu/~paw
Verilog Mode
A mode to edit Verilog HDL files with Emacs.
http://www.verilog.com/
Hamburg VHDL Archive
Home of many free, open source designs in VHDL.
http://tech-www.informatik.uni-hamburg.de/...
Exemplar Logic, Inc.
Provides LeonardoSpectrum which is a CPLD, FPGA and desktop ASIC synthesis solution.
http://www.exemplar.com/
Exsultation
Offers full turn-key, customer facility training programs in VHDL, Verilog,C++ modeling, formal verification, and FPGA design.
http://www.exsultation.com/
Aldec
HDL design entry and simulation software for programmable logic designers.
http://www.aldec.com/
Green Mountain
VHDL compilers and design environments, including Windows, DOS and Linux support.
http://www.gmvhdl.com/
Synplicity
Logic synthesis and verification products for FPGA and ASIC designers.
http://www.synplicity.com/
Translogic
EASE and EALE provide HDL aware entry tools, both graphical and text based. Also providing Linux support.
http://www.translogiccorp.com/
Nova Engineering
Megafunctions are modular, DSP algorithms and functional blocks for custom use in PLD or ASIC designs.
http://www.nova-eng.com/vhdl.html
SynaptiCAD
Provides Verilog, VHDL, TDML, logic analyzer, pattern generator, and SPICE tools.
http://www.syncad.com/
Calyptech Design Services
Offers ASIC and FPGA design and verification services, drivers and tools. Includes product and service overview and PDF detailed product specifications available.
http://www.calyptech.com/
C Level Design
Offers a design and verification environment for C/C++ with synthesis to VHDL and Verilog code.
http://www.cleveldesign.com/
VIZEF
Provide graphical HDL tools for design and verification.
http://www.vizef.demon.co.uk/
Saros
Offering a full suite of VHDL and Verilog design tools, from design-entry, simulation and synthesis to verification and training.
http://www.saros.co.uk/
TemporalRover
Provides automatic verification of protocols and reactive systems through temporal logic specifications.
http://www.time-rover.com/
iMODL
The iValidate toolset comprises ready-to-use functional verification tools and simulation models.
http://www.imodl.com/
Rajesh Verilog FAQ
General Verilog resource that includes a FAQ, tutorials, and commercial information.
http://www.angelfire.com/in/rajesh52/veril...
Symphony EDA
Offers a VHDL compiler/simulator with an integrated development environment. Supports VHDL'93, Vital, and SDF. Free command-line tools also available.
http://www.symphonyeda.com/
TimingTool - Online timing diagram editor
Free to use online timing diagram editor. Timing diagrams are saved in TDML format. Translators from TDML to DXF, VHDL, and Verilog are also supplied.
http://www.timingtool.com/
Doulos Ltd
Training and consultancy across Europe in VHDL, Verilog, SystemC, Perl and Tcl/Tk. Offers free resources for hardware designers.
http://www.doulos.com/
Verilog-AMS
The Verilog-AMS Technical Subcommittee has been created with the charter to develop, update and promote analog and mixed signal extensions to the Verilog (IEEE-1364) language.
http://www.eda-stds.org/verilog-ams/
CAST, Inc.
An intellectual property provider that develops and supports synthesizable cores and simulation models for electronic design using VHDL.
http://www.cast-inc.com/
Freeware Verilog & VHDL
This is the home page for a Freeware Verilog,VHDL and Analog Mixed Signal project (a.k.a. the V-2000 project, still in its infancy).
http://www.v-ms.com/
Sutherland HDL, Inc.
Provides Verilog HDL and Verilog PLI training workshops and consulting services.
http://www.sutherland-hdl.com/
Sandstrom Engineering
HDL pre-synthesis tools which check code for synthesizability. Then suggest replacement code where problems are found.
http://www.sandstrom.org/about.htm
Esperan
VHDL, Verilog and FPGA training courses held in the US, Europe and the UK.
http://www.esperan.com/
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2006